#3 添加C10移植

Signed-off-by: wlxuz <myxuan475@126.com>
Change-Id: I85ef1d39af9eb4b17396dea016c75bf363c1e118

C10/CMakeLists.txt

@@ -0,0 +1,79 @@
+
+#rights reserved
+cmake_minimum_required(VERSION 2.8)
+
+include(${ROOT_DIR}/buildtools/cmake/gcc-linaro-7.5.0-2019.12-x86_64_arm-linux-gnueabihf.cmake)
+#project name
+set(PROJECT_NAME "leo-das")
+
+message(INFO " SYSTEM_ARCH:${SYSTEM_ARCH}\n")
+set(CMAKE_BUILD_TYPE RELEASE)
+set(CMAKE_CXX_FLAGS "-fPIC -std=gnu++0x")
+set(CMAKE_C_FLAGS "-O3 -fPIC -Wunused-result")
+
+# 获取当前的分支
+set(GIT_BRANCH "")
+get_git_branch(GIT_BRANCH)
+string(REGEX REPLACE ".*/(.*)" "\\1" _git_branch "${GIT_BRANCH}")
+message(STATUS "Git branch is ${_git_branch}")                     # 宏的结束
+
+add_definitions(-DDAS_VERSION=\"${_git_branch}\")
+
+project(${PROJECT_NAME})
+
+message("PRODUCT_NAME: ${PRODUCT_NAME}")
+message(STATUS "PROJECT_SOURCE_DIR: ${PRODUCT_ROOT_DIR}, PROJECT_BINARY_DIR: ${PRODUCT_BUILD_DIR}")
+
+add_definitions(-DUSE_HTNICE)
+add_definitions(-DHTNICE_K4)
+# add_definitions(-DLINUX)
+# add_definitions(-D__arm__)
+
+set(BUILD_SHARED_LIBS OFF)
+set(EVENT_LIBRARY_TYPE STATIC)
+
+# link_directories(
+#     ${PROJECT_BINARY_DIR}/thirdparty/openssl/ssl
+# )
+
+include_directories(${PRODUCT_ROOT_DIR})
+
+build_subdirectory(thirdparty/openssl link thirdparty/openssl/ssl)
+build_subdirectory(thirdparty/mbedtls)
+build_subdirectory(thirdparty/zlib)
+
+set(LIBXML2_WITH_PYTHON OFF)
+build_subdirectory(thirdparty/libxml2)
+
+build_subdirectory(thirdparty/SQLiteCpp include thirdparty/SQLiteCpp/sqlite3)
+
+build_subdirectory(utils)
+if (THIRDPARTY_LIBXML2)
+message("libxml2: ON")
+else()
+message("libxml2: OFF")
+endif()
+
+build_subdirectory(gw_leo)
+
+# build sx1302_hal
+# . ../../../../misc_config
+# LICHEE_TOOL=out/${MISC_CHIP}/linux/common/buildroot/host/opt/ext-toolchain/bin
+# export LICHEE_CHIP=${MISC_CHIP}
+# export FBDEV=${MISC_FBDEV}
+# export SDK_LIB=${MISC_SDKLIB}
+# export CEDARX_LIB=${MISC_CEDARXLIB}
+# export PATH=$PATH:$PWD/../../../../../$LICHEE_TOOL/
+# make
+# * `export ARCH=arm`
+# * `export CROSS_COMPILE=arm-linux-gnueabihf-`
+# set(ARCH "arm")
+# set(CROSS_COMPILE ${CMAKE_C_COMPILER})
+# execute_process(
+#     COMMAND ${MAKE} -j ${JOB_N} --directory=${PRODUCT_BUILD_DIR}/Lora/sx1302_hal
+#     WORKING_DIRECTORY ${PRODUCT_ROOT_DIR}/Lora/sx1302_hal
+#     OUTPUT_VARIABLE output
+#     ERROR_VARIABLE error
+#     )
+
+# message(STATUS "Output: ${output}, error: ${error}")

C10/build.py

@@ -0,0 +1,39 @@
+import os
+import sys
+import subprocess
+import shutil
+import re
+import getpass
+import glob
+
+def build(build_utils, job_n, product_name, root_dir, bin_dir):
+    # 设置环境变量
+    os.environ['ARCH'] = 'arm'
+    os.environ['CROSS_COMPILE'] = f'{root_dir}/buildtools/toolchains/gcc-linaro-7.5.0-2019.12-x86_64_arm-linux-gnueabihf/bin/arm-linux-gnueabihf-'
+    os.environ["DESTDIR"] = f'{bin_dir}/Lora/sx1302_hal'
+    os.environ["OBJDIR"] = f'{bin_dir}/Lora/sx1302_hal'
+    # 调用make命令，指定工作目录
+    # 注意：subprocess.run在Python 3.5及以上版本中可用
+    # 如果你使用的是旧版本的Python，可能需要使用subprocess.call或其他方法
+    os.makedirs(f'{bin_dir}/Lora/sx1302_hal/install', exist_ok=True)
+    build_utils.replace_value_in_file(f'{root_dir}/Lora/sx1302_hal/target.cfg', "TARGET_DIR", f'{bin_dir}/Lora/sx1302_hal/install')
+    build_utils.replace_value_in_file(f'{root_dir}/Lora/sx1302_hal/target.cfg', "TARGET_USR", getpass.getuser())
+
+    subprocess.check_call(['make', f'--directory={root_dir}/Lora/sx1302_hal', f'--jobs={job_n}'])
+
+
+def build_install(build_utils, job_n, product_name, root_dir, bin_dir):
+    # install test_loragw_*
+    build_utils.move_matching_files(f'{root_dir}/Lora/sx1302_hal/libloragw/test_loragw_*', f'{bin_dir}/Lora/sx1302_hal/install/')
+    build_utils.move_matching_files(f'{root_dir}/Lora/sx1302_hal/tools/reset_lgw.sh', f'{bin_dir}/Lora/sx1302_hal/install/', True)
+
+    # install packet_forwarder
+    build_utils.move_matching_files(f'{root_dir}/Lora/sx1302_hal/packet_forwarder/lora_pkt_fwd', f'{bin_dir}/Lora/sx1302_hal/install/')
+    build_utils.move_matching_files(f'{root_dir}/Lora/sx1302_hal/packet_forwarder/global_conf.json.sx1250.*', f'{bin_dir}/Lora/sx1302_hal/install/', True)
+    build_utils.move_matching_files(f'{root_dir}/Lora/sx1302_hal/packet_forwarder/global_config.json.sx1255.*', f'{bin_dir}/Lora/sx1302_hal/install/', True)
+    build_utils.move_matching_files(f'{root_dir}/Lora/sx1302_hal/packet_forwarder/global_config.json.sx1257.*', f'{bin_dir}/Lora/sx1302_hal/install/', True)
+
+    build_utils.move_matching_files(f'{root_dir}/Lora/sx1302_hal/util_boot/boot', f'{bin_dir}/Lora/sx1302_hal/install/')
+    build_utils.move_matching_files(f'{root_dir}/Lora/sx1302_hal/util_chip_id/chip_id', f'{bin_dir}/Lora/sx1302_hal/install/')
+    build_utils.move_matching_files(f'{root_dir}/Lora/sx1302_hal/util_net_downlink/net_downlink', f'{bin_dir}/Lora/sx1302_hal/install/')
+    build_utils.move_matching_files(f'{root_dir}/Lora/sx1302_hal/util_spectral_scan/spectral_scan', f'{bin_dir}/Lora/sx1302_hal/install/')

C10/code.patch

@@ -0,0 +1,157 @@
+diff -Naur Lora/sx1302_hal/libloragw/inc/loragw_i2c.h Lora/sx1302_hal/libloragw/inc/loragw_i2c.h
+--- sx1302_hal/libloragw/inc/loragw_i2c.h	2024-07-22 12:16:23.221274900 +0800
++++ sx1302_hal/libloragw/inc/loragw_i2c.h	2023-08-03 19:18:09.000000000 +0800
+@@ -29,7 +29,7 @@
+ #define LGW_I2C_SUCCESS     0
+ #define LGW_I2C_ERROR       -1
+
+-#define I2C_DEVICE          "/dev/i2c-1"
++#define I2C_DEVICE          "/dev/i2c-4"
+
+ /* -------------------------------------------------------------------------- */
+ /* --- PUBLIC FUNCTIONS PROTOTYPES ------------------------------------------ */
+diff -Naur Lora/sx1302_hal/libloragw/src/loragw_stts751.c Lora/sx1302_hal/libloragw/src/loragw_stts751.c
+--- sx1302_hal/libloragw/src/loragw_stts751.c	2024-07-22 12:16:23.248274400 +0800
++++ sx1302_hal/libloragw/src/loragw_stts751.c	2023-08-03 19:18:09.000000000 +0800
+@@ -81,6 +81,8 @@
+     int err;
+     uint8_t val;
+
++#if 0
++
+     /* Check Input Params */
+     if (i2c_fd <= 0) {
+         printf("ERROR: invalid I2C file descriptor\n");
+@@ -141,6 +143,7 @@
+         DEBUG_PRINTF("ERROR: failed to write I2C device 0x%02X (err=%i)\n", i2c_addr, err);
+         return LGW_I2C_ERROR;
+     }
++#endif
+
+     return LGW_I2C_SUCCESS;
+ }
+@@ -148,6 +151,8 @@
+ /* ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ */
+
+ int stts751_get_temperature(int i2c_fd, uint8_t i2c_addr, float * temperature) {
++
++#if 0
+     int err;
+     uint8_t high_byte, low_byte;
+     int8_t h;
+@@ -176,6 +181,9 @@
+     *temperature = ((h << 8) | low_byte) / 256.0;
+
+     DEBUG_PRINTF("Temperature: %f C (h:0x%02X l:0x%02X)\n", *temperature, high_byte, low_byte);
++#endif
++
++   *temperature = 25.0;
+
+     return LGW_I2C_SUCCESS;
+ }
+
+diff -Naur Lora/sx1302_hal/tools/reset_lgw.sh Lora/sx1302_hal/tools/reset_lgw.sh
+--- sx1302_hal/tools/reset_lgw.sh	2024-07-25 15:57:22.548646500 +0800
++++ sx1302_hal/tools/reset_lgw.sh	2023-08-03 19:18:10.000000000 +0800
+@@ -12,10 +12,10 @@
+ # GPIO mapping has to be adapted with HW
+ #
+
+-SX1302_RESET_PIN=23     # SX1302 reset
+-SX1302_POWER_EN_PIN=18  # SX1302 power enable
+-SX1261_RESET_PIN=22     # SX1261 reset (LBT / Spectral Scan)
+-AD5338R_RESET_PIN=13    # AD5338R reset (full-duplex CN490 reference design)
++SX1302_RESET_PIN=53     # SX1302 reset
++#SX1302_POWER_EN_PIN=18  # SX1302 power enable
++#SX1261_RESET_PIN=22     # SX1261 reset (LBT / Spectral Scan)
++#AD5338R_RESET_PIN=13    # AD5338R reset (full-duplex CN490 reference design)
+
+ WAIT_GPIO() {
+     sleep 0.1
+@@ -24,34 +24,34 @@
+ init() {
+     # setup GPIOs
+     echo "$SX1302_RESET_PIN" > /sys/class/gpio/export; WAIT_GPIO
+-    echo "$SX1261_RESET_PIN" > /sys/class/gpio/export; WAIT_GPIO
+-    echo "$SX1302_POWER_EN_PIN" > /sys/class/gpio/export; WAIT_GPIO
+-    echo "$AD5338R_RESET_PIN" > /sys/class/gpio/export; WAIT_GPIO
++    #echo "$SX1261_RESET_PIN" > /sys/class/gpio/export; WAIT_GPIO
++    #echo "$SX1302_POWER_EN_PIN" > /sys/class/gpio/export; WAIT_GPIO
++    #echo "$AD5338R_RESET_PIN" > /sys/class/gpio/export; WAIT_GPIO
+
+     # set GPIOs as output
+     echo "out" > /sys/class/gpio/gpio$SX1302_RESET_PIN/direction; WAIT_GPIO
+-    echo "out" > /sys/class/gpio/gpio$SX1261_RESET_PIN/direction; WAIT_GPIO
+-    echo "out" > /sys/class/gpio/gpio$SX1302_POWER_EN_PIN/direction; WAIT_GPIO
+-    echo "out" > /sys/class/gpio/gpio$AD5338R_RESET_PIN/direction; WAIT_GPIO
++    #echo "out" > /sys/class/gpio/gpio$SX1261_RESET_PIN/direction; WAIT_GPIO
++    #echo "out" > /sys/class/gpio/gpio$SX1302_POWER_EN_PIN/direction; WAIT_GPIO
++    #echo "out" > /sys/class/gpio/gpio$AD5338R_RESET_PIN/direction; WAIT_GPIO
+ }
+
+ reset() {
+     echo "CoreCell reset through GPIO$SX1302_RESET_PIN..."
+-    echo "SX1261 reset through GPIO$SX1302_RESET_PIN..."
+-    echo "CoreCell power enable through GPIO$SX1302_POWER_EN_PIN..."
+-    echo "CoreCell ADC reset through GPIO$AD5338R_RESET_PIN..."
++    #echo "SX1261 reset through GPIO$SX1302_RESET_PIN..."
++    #echo "CoreCell power enable through GPIO$SX1302_POWER_EN_PIN..."
++    #echo "CoreCell ADC reset through GPIO$AD5338R_RESET_PIN..."
+
+     # write output for SX1302 CoreCell power_enable and reset
+-    echo "1" > /sys/class/gpio/gpio$SX1302_POWER_EN_PIN/value; WAIT_GPIO
++    #echo "1" > /sys/class/gpio/gpio$SX1302_POWER_EN_PIN/value; WAIT_GPIO
+
+     echo "1" > /sys/class/gpio/gpio$SX1302_RESET_PIN/value; WAIT_GPIO
+     echo "0" > /sys/class/gpio/gpio$SX1302_RESET_PIN/value; WAIT_GPIO
+
+-    echo "0" > /sys/class/gpio/gpio$SX1261_RESET_PIN/value; WAIT_GPIO
+-    echo "1" > /sys/class/gpio/gpio$SX1261_RESET_PIN/value; WAIT_GPIO
++    #echo "0" > /sys/class/gpio/gpio$SX1261_RESET_PIN/value; WAIT_GPIO
++    #echo "1" > /sys/class/gpio/gpio$SX1261_RESET_PIN/value; WAIT_GPIO
+
+-    echo "0" > /sys/class/gpio/gpio$AD5338R_RESET_PIN/value; WAIT_GPIO
+-    echo "1" > /sys/class/gpio/gpio$AD5338R_RESET_PIN/value; WAIT_GPIO
++    #echo "0" > /sys/class/gpio/gpio$AD5338R_RESET_PIN/value; WAIT_GPIO
++    #echo "1" > /sys/class/gpio/gpio$AD5338R_RESET_PIN/value; WAIT_GPIO
+ }
+
+ term() {
+@@ -60,18 +60,18 @@
+     then
+         echo "$SX1302_RESET_PIN" > /sys/class/gpio/unexport; WAIT_GPIO
+     fi
+-    if [ -d /sys/class/gpio/gpio$SX1261_RESET_PIN ]
+-    then
+-        echo "$SX1261_RESET_PIN" > /sys/class/gpio/unexport; WAIT_GPIO
+-    fi
+-    if [ -d /sys/class/gpio/gpio$SX1302_POWER_EN_PIN ]
+-    then
+-        echo "$SX1302_POWER_EN_PIN" > /sys/class/gpio/unexport; WAIT_GPIO
+-    fi
+-    if [ -d /sys/class/gpio/gpio$AD5338R_RESET_PIN ]
+-    then
+-        echo "$AD5338R_RESET_PIN" > /sys/class/gpio/unexport; WAIT_GPIO
+-    fi
++    #if [ -d /sys/class/gpio/gpio$SX1261_RESET_PIN ]
++    #then
++    #    echo "$SX1261_RESET_PIN" > /sys/class/gpio/unexport; WAIT_GPIO
++    #fi
++    #if [ -d /sys/class/gpio/gpio$SX1302_POWER_EN_PIN ]
++    #then
++    #    echo "$SX1302_POWER_EN_PIN" > /sys/class/gpio/unexport; WAIT_GPIO
++    #fi
++    #if [ -d /sys/class/gpio/gpio$AD5338R_RESET_PIN ]
++    #then
++    #    echo "$AD5338R_RESET_PIN" > /sys/class/gpio/unexport; WAIT_GPIO
++    #fi
+ }
+
+ case "$1" in
+@@ -90,4 +90,4 @@
+     ;;
+ esac
+
+-exit 0
+\ No newline at end of file
++exit 0

C10/reset_lgw.sh

@@ -0,0 +1,93 @@
+#!/bin/sh
+
+# This script is intended to be used on SX1302 CoreCell platform, it performs
+# the following actions:
+#       - export/unpexort GPIO23 and GPIO18 used to reset the SX1302 chip and to enable the LDOs
+#       - export/unexport GPIO22 used to reset the optional SX1261 radio used for LBT/Spectral Scan
+#
+# Usage examples:
+#       ./reset_lgw.sh stop
+#       ./reset_lgw.sh start
+
+# GPIO mapping has to be adapted with HW
+#
+
+SX1302_RESET_PIN=53     # SX1302 reset
+#SX1302_POWER_EN_PIN=18  # SX1302 power enable
+#SX1261_RESET_PIN=22     # SX1261 reset (LBT / Spectral Scan)
+#AD5338R_RESET_PIN=13    # AD5338R reset (full-duplex CN490 reference design)
+
+WAIT_GPIO() {
+    sleep 0.1
+}
+
+init() {
+    # setup GPIOs
+    echo "$SX1302_RESET_PIN" > /sys/class/gpio/export; WAIT_GPIO
+    #echo "$SX1261_RESET_PIN" > /sys/class/gpio/export; WAIT_GPIO
+    #echo "$SX1302_POWER_EN_PIN" > /sys/class/gpio/export; WAIT_GPIO
+    #echo "$AD5338R_RESET_PIN" > /sys/class/gpio/export; WAIT_GPIO
+
+    # set GPIOs as output
+    echo "out" > /sys/class/gpio/gpio$SX1302_RESET_PIN/direction; WAIT_GPIO
+    #echo "out" > /sys/class/gpio/gpio$SX1261_RESET_PIN/direction; WAIT_GPIO
+    #echo "out" > /sys/class/gpio/gpio$SX1302_POWER_EN_PIN/direction; WAIT_GPIO
+    #echo "out" > /sys/class/gpio/gpio$AD5338R_RESET_PIN/direction; WAIT_GPIO
+}
+
+reset() {
+    echo "CoreCell reset through GPIO$SX1302_RESET_PIN..."
+    #echo "SX1261 reset through GPIO$SX1302_RESET_PIN..."
+    #echo "CoreCell power enable through GPIO$SX1302_POWER_EN_PIN..."
+    #echo "CoreCell ADC reset through GPIO$AD5338R_RESET_PIN..."
+
+    # write output for SX1302 CoreCell power_enable and reset
+    #echo "1" > /sys/class/gpio/gpio$SX1302_POWER_EN_PIN/value; WAIT_GPIO
+
+    echo "1" > /sys/class/gpio/gpio$SX1302_RESET_PIN/value; WAIT_GPIO
+    echo "0" > /sys/class/gpio/gpio$SX1302_RESET_PIN/value; WAIT_GPIO
+
+    #echo "0" > /sys/class/gpio/gpio$SX1261_RESET_PIN/value; WAIT_GPIO
+    #echo "1" > /sys/class/gpio/gpio$SX1261_RESET_PIN/value; WAIT_GPIO
+
+    #echo "0" > /sys/class/gpio/gpio$AD5338R_RESET_PIN/value; WAIT_GPIO
+    #echo "1" > /sys/class/gpio/gpio$AD5338R_RESET_PIN/value; WAIT_GPIO
+}
+
+term() {
+    # cleanup all GPIOs
+    if [ -d /sys/class/gpio/gpio$SX1302_RESET_PIN ]
+    then
+        echo "$SX1302_RESET_PIN" > /sys/class/gpio/unexport; WAIT_GPIO
+    fi
+    #if [ -d /sys/class/gpio/gpio$SX1261_RESET_PIN ]
+    #then
+    #    echo "$SX1261_RESET_PIN" > /sys/class/gpio/unexport; WAIT_GPIO
+    #fi
+    #if [ -d /sys/class/gpio/gpio$SX1302_POWER_EN_PIN ]
+    #then
+    #    echo "$SX1302_POWER_EN_PIN" > /sys/class/gpio/unexport; WAIT_GPIO
+    #fi
+    #if [ -d /sys/class/gpio/gpio$AD5338R_RESET_PIN ]
+    #then
+    #    echo "$AD5338R_RESET_PIN" > /sys/class/gpio/unexport; WAIT_GPIO
+    #fi
+}
+
+case "$1" in
+    start)
+    term # just in case
+    init
+    reset
+    ;;
+    stop)
+    reset
+    term
+    ;;
+    *)
+    echo "Usage: $0 {start|stop}"
+    exit 1
+    ;;
+esac
+
+exit 0